In the absence of a protective circuit, the instantaneous enabling of operation of a converter during startup can result in startup at maximum pulse width so as to cause a large current surge at the converter output. A restart of the converter after a power line disturbance, for instance, can also produce such potentially damaging current surges. The unsafe conditions need only persist at startup or restart for several milliseconds in order to cause damage to modern circuits, such as MOSFET switches, which depend on stable supply voltages.
One known way to protect a power converter during startup or restart of a power converter is to provide a “soft-start” circuit. Known soft-start circuits typically delay a complete startup of the power converter by linearly increasing a Pulse Width Modulator (PWM) pulse width until the output of the converter reaches a desired operational level. Such known soft-start circuits typically provide a delay from tens of milliseconds up to seconds before full operation of the converter can begin, or resume after a power line interruption.
FIG. 1 shows a schematic diagram of a prior art boost converter 10 that provides a soft-start feature. A rectified input line voltage Vin from a conventional bridge rectifier (not shown) is applied at input terminals 2 and 4. The boost converter 10 includes a boost inductor 32, an electronic switch 30, a diode 34, and a PWM controller 28 to produce an output voltage across capacitor 40 connected between output terminals 6 and 8. The boost converter 10 uses a switching technique to boost the rectified input voltage to a regulated DC output voltage for delivery to a load (not shown) via terminals 6 and 8. Switch 30 is typically a FET having a control input that is connected to an output pin (GDRV) of PWM controller 28. PWM controller 28 has a voltage feedback input pin (VFB) to which is applied a voltage from a voltage divider formed by series resistors 36 and 38 connected across the output terminals 6 and 8. PWM controller 28 compares the divided output DC voltage to a reference voltage input (not shown) to maintain the desired regulated output DC voltage. The PWM controller may alternatively provide a power factor correction feature (not shown) for converter 10. One exemplary PWM controller for use in converter 10 is manufactured by STMicroelectronics under their reference L4981. Other suitable controller devices are available from other manufacturers.
PWM controller 28 includes a soft-start (SS) terminal for a soft-start mode. The soft-start mode for the PWM controller 28 is designed to avoid current overload on the switch during the ramp-up of the output boosted voltage. Converter 10 includes a soft-start protection circuit 50 that typically comprises a soft-start capacitor 12. PWM controller 28 includes an internal current generator (not shown) that, along with the soft-start capacitor 12, defines a soft-start time constant. In this way, the PWM controller 28 generates a soft-start voltage at the soft-start terminal. The soft-start voltage at the soft-start terminal increases linearly at startup until a predetermined threshold is reached, at which point the soft-start mode inside the PWM terminates.
FIG. 2 illustrates waveforms for the operation of the soft-start feature for the circuit shown in FIG. 1. Trace A is a waveform showing the “Start Signal” which indicates a start or restart of the converter prior to a soft-start interval. Trace B is a waveform showing the soft-start voltage Vss, also referred to as the “SS voltage”, across the soft-start capacitor 12 in FIG. 1. The SS voltage ramps up according to a time constant defined typically by the PWM internal current generator (not shown) and the soft-start capacitor 12. Trace C is a waveform showing the voltage at the output terminals 6 and 8. The soft-start voltage increases linearly until a predetermined threshold is reached, at which point the soft-start mode inside the PWM switches off. The soft-start time for the known circuit in FIG. 1 is typically on the order of tens of milliseconds. Trace D is a waveform showing the “OK Signal” that, when active indicates the predetermined threshold has been reached. The “OK signal” thus signals when full operation of the converter is enabled to resume.
A drawback of known soft-start circuits is that the soft-start time is much longer than necessary for indicating that an adequate output voltage has been established. As can be seen in Traces C and D in FIG. 2 as an example, the output voltage would have stabilized well before the threshold of the SS voltage has been reached. Users are also increasingly demanding that their devices powered from a power converter be available sooner after startup or restart of the converter. Even a soft-start time of tens of milliseconds fails to meet the needs of users who are demanding maximum availability and therefore minimum down time for critical applications. Users also demand that protection be provided against damage to their devices during startup and during restart of the converter after power line disturbances.
A circuit is therefore needed to significantly reduce the soft-start time while providing the required circuit protection.